AI Server PCB Materials: Guide to Layers, HDI & Design

Introduction

In recent years, AI has seen broad adoption, pushing up demand for AI servers. AI server PCB materials are commonly multi-layer, high-frequency, and high-speed. This guide walks you through key material and production considerations for these boards.

What Is an AI Server PCB?

AI servers use complex, high-layer-count circuit boards to support high data throughput, dense component integration, and high power delivery. These boards connect CPUs, GPUs or accelerator modules, memory subsystems, PCIe devices, network interfaces, and power circuitry. 112G- and 224G-class SerDes channels place tight limits on insertion loss, crosstalk, impedance discontinuities, and via stubs, making low-loss PCB materials and controlled stackups increasingly important.

What Types of PCBs Are Used in AI Servers?

An AI server is not a single unified board, but an ecosystem of highly specialized modules. Each PCB type demands a distinct balance of signal integrity, power delivery, and cost sensitivity.

PCB Materials Used in AI Servers

Standard FR-4 vs. Low-Loss and Ultra-Low-Loss Laminates

Standard FR-4 remains viable for power distribution and basic control circuitry. However, long high-speed PCIe channels often use low-loss or ultra-low-loss laminates to control insertion loss. In cost-sensitive designs, higher-performance laminates can be concentrated around the most loss-sensitive high-speed channels through a carefully engineered hybrid stackup.

Dk and Df for High-Speed Signal Transmission

Dk affects impedance and signal propagation, while Df contributes directly to dielectric loss. High-speed server designs therefore favor materials with stable Dk and low Df across the operating frequency range. Fluctuations in Dk across a board alter impedance, causing signal reflections, while high Df directly translates to signal energy lost as heat.

Copper Foil and Surface Roughness

Conductor loss increases at high frequencies as skin effect and copper surface roughness become more significant. VLP and HVLP copper foils reduce roughness-related conductor loss and are widely used in high-speed PCB constructions.

Glass Weave, Resin Systems and Thermal Properties

Glass-weave effects can contribute to differential-pair skew when the two traces experience different effective dielectric environments. Spread-glass constructions help create a more uniform dielectric environment around high-speed traces. For thick, high-layer-count boards, Tg, Td, Z-axis CTE, moisture resistance, and CAF resistance are also important material properties.

Hybrid Stackups for Performance and Cost

Because ultra-low-loss materials carry a significant price premium, engineers frequently utilize hybrid stack-ups to reduce overall cost. In a hybrid build, premium low-loss materials are reserved for critical SerDes layers, while lower-cost high-Tg materials are utilized for control and power areas.

Common Low-Loss Material Families

Industry-standard low-loss material families include MEGTRON 6/7/8, Isola Tachyon, Shengyi high-speed materials, and Rogers laminates. Second-source qualification for these materials requires rigorous validation to ensure the substitute meets exact electrical, thermal, and mechanical requirements.

28-Layer MEGTRON 6 AI PCB Case Study

PCBMay helped a customer complete prototype validation for their AI hardware project. This customized 28-layer PCB uses Panasonic MEGTRON 6 high-speed material with a Tg of 185°C. The 28-layer structure and 3.35 mm board thickness demanded precise multilayer alignment and accurate drilling. We adopted resin-filled and planarized vias to meet the customer’s structural and surface requirements.

Before manufacturing, our engineering team completed a full review of the stackup design, material specifications, via structure, and fabrication files to ensure stable and reliable production results.

High-Layer and HDI Structures in AI Server PCBs

Why AI Server PCBs Need High Layer Counts

Dense high-speed routing requires multiple signal layers together with dedicated ground and power planes. Extensive ground and power planes must interleave between signal layers to cut crosstalk and supply stable power, frequently pushing layer counts beyond 40.

HDI, Microvias and Sequential Lamination

Escaping sub-0.5mm pitch BGAs requires HDI technology. Laser-drilled microvias drop signals from outer pads to inner layers without penetrating the entire board, saving critical routing space on lower layers.

Via-in-Pad for Fine-Pitch BGA Breakout

Via-in-pad plated over (VIPPO) places the via directly inside the surface-mount pad. The via barrel is filled with epoxy resin and plated flat with copper, allowing dense processor packages to sit flush while immediately routing signals inward.

Back Drilling and Via Stub Control

Standard plated through-holes leave behind excess copper stubs that cause severe signal reflections in high-frequency channels. Back drilling removes part of the unused via barrel, reducing stub length and improving high-speed channel performance. The manufacturer’s back-drill depth tolerance must precisely match the stack-up design to protect channel integrity.

Controlled Impedance and Signal Integrity

Controlled impedance requires consistent dielectric thickness, copper geometry, and etching control. TDR coupons are commonly used to verify that the finished PCB meets the specified impedance target and tolerance.

Signal, Power and Thermal Requirements

High-Speed Interfaces and Signal Integrity

PCIe, DDR5, and accelerator interconnects share the same physical substrate. Loss, crosstalk, and skew must be carefully budgeted per channel. Low CTE cores are selected to maintain stable physical registration across the board’s lifespan.

Power Integrity and High-Current Delivery

GPU load steps draw massive, instantaneous current. Power integrity relies on low-impedance planes and optimally placed voltage regulator modules (VRMs). Heavy copper planes and dense via arrays are sized specifically to mitigate voltage drop and dissipate the resulting thermal load.

PCB-Level Thermal Management

Heat must be rapidly moved away from high-power silicon into heat sinks or cold plates. Thermal vias, embedded copper coins, and massive ground planes act as primary thermal conduits to manage severe thermal stress and eliminate the risk of long-term delamination.

AI Server PCB Manufacturing Process

Material Preparation and Inner-Layer Imaging

Fabrication begins with material verification, preparation, and inner-layer imaging. Fine-line geometries require Laser Direct Imaging (LDI) to ensure accurate trace widths, which are immediately verified by Automated Optical Inspection (AOI).

Lamination and Layer Registration

High layer counts and hybrid materials significantly increase lamination registration difficulty. The manufacturer must control material scaling and press behavior under intense heat and pressure to maintain accurate layer-to-layer registration throughout the multilayer stack.

Laser Drilling, Mechanical Drilling and Via Filling

Low-loss resin systems and high glass content materials often require adjusted drilling parameters and specialized desmear chemistry to achieve clean hole walls.

Copper Plating and Fine-Line Etching

Thick, high-layer-count server boards can require high-aspect-ratio plated through holes. These require robust plating control to avoid barrel cracks, voids, or subsequent reliability failures in the field.

Back Drilling and Impedance Control

Following plating, high-speed vias are back-drilled to a specified depth. The panels are then tested using Time Domain Reflectometry (TDR) coupons to verify that impedance values match the engineering models.

Solder Mask, Surface Finish and Final Routing

A high-resolution solder mask is applied with tight registration to avoid encroaching on fine-pitch pads. Surface finishes such as ENIG, ENEPIG, or immersion silver are selected based strictly on BGA assembly requirements, connector needs, and target shelf life.

Electrical and Impedance Testing

Finished bare boards undergo electrical testing for opens and shorts. Cross-sections (microsections) are physically cut and examined under microscopes to verify plating thickness and layer registration.

AI Server PCB Assembly Requirements

Solder Paste Printing and SPI

Printing accurate paste volumes across various pad sizes requires engineered stencils. Solder Paste Inspection (SPI) optically verifies volume, height, and offset before any components are placed.

Fine-Pitch BGA and High-Density SMT Placement

Advanced Pick-and-Place systems handle massive GPU packages alongside delicate 0201 passive components. Component orientation and placement offset are verified in real time.

Reflow Profiling and Warpage Control

Large GPU, CPU, and switch packages require precise board flatness and highly stable reflow control to prevent BGA warpage during heating. Furthermore, heavy copper planes and large thermal mass connectors create severe uneven heating during soldering, demanding highly customized thermal profiles.

AOI and X-Ray Inspection

While 3D AOI catches visible placement defects, X-ray inspection is absolutely mandatory for verifying the integrity of hidden BGA and via-in-pad solder joints.

First-Article, ICT and Functional Testing

First-Article Inspection (FAI) validates the initial assembly process to ensure complete alignment with design specifications before mass production begins. Following assembly, In-Circuit Testing (ICT) probes specific test points to verify component placement and detect shorts, while functional testing powers the board to simulate real-world data center workloads and validate interface performance.

Common AI Server PCB Manufacturing Challenges

Catching drift early in the manufacturing process is essential for preventing significant scrap costs on high-layer boards. Key risks include:

• Layer Registration: Maintaining physical alignment across 30+ layers of dissimilar materials.
• Microvia Reliability: Preventing thermal fatigue cracks through optimized laser parameters.
• Impedance Deviation: Managing the three-way balance of Dk, material thickness, and etch compensation.
• Via Stub: Removing resonance with precise back drilling.
• Plating Uniformity: Preventing voids in high-aspect-ratio holes on thick substrate designs.
• Warpage: Balancing copper distribution and managing thermal mass to ensure the board remains flat enough for BGA assembly.
• Delamination: Controlling moisture and Tg limits throughout assembly.
• BGA Solder Defects: Preventing hidden voiding through fill quality and X-ray analysis.

Quality Control for AI Server PCBs

Material and Process Traceability

Laminate, foil, and finish lot numbers are tracked by work order. Press cycles, drill logs, and test results are permanently linked to individual panel serial numbers to support rigorous audits.

Bare PCB AOI and Electrical Testing

Every internal layer is optically scanned before lamination. After fabrication, flying probe or bed-of-nails testers verify that thousands of interconnects are free of shorts or opens.

Impedance Testing and Cross-Section Verification

TDR confirms the electrical reality matches the simulation. Destructive cross-section testing verifies plating thickness in vias, ensuring sufficient copper exists to survive thermal cycling.

SPI, AOI and X-Ray for PCB Assembly

Quality gates at paste printing (SPI), placement (pre-reflow AOI), and post-reflow (3D AOI and X-Ray) ensure defects are caught immediately, conforming strictly to IPC-A-610 Class 2 or Class 3 criteria.

Functional Testing Based on Product Requirements

Power-on sequences, interface diagnostics, and burn-in tests are executed on custom fixtures to guarantee the PCBA performs identically to the engineering prototype.

PCBMay AI Server PCB Manufacturing Capabilities

Procuring bare boards and full PCBAs from a single supplier accelerates your hardware iteration. PCBMay’s manufacturing infrastructure is built specifically for the extreme demands of AI servers, operating under strict IPC-A-610 standards with comprehensive 3D AOI and X-ray inspection.

Our Core AI Server & PCBA Capabilities:

• Extreme Layer Counts: Fabricating highly dense boards up to 40-plus layers and robust backplanes up to 10mm thick.
• HDI & Precision Microvias: Enabling high-density routing through 4mil laser drilling, via-in-pad resin filling, precise depth-controlled back-drilling, and 20:1 aspect ratios for plated through-holes.
• Impedance & Power Integrity: Protecting signal integrity with strict ±10% impedance tolerances (±5 ohms for traces <50 ohms) and managing massive thermal loads with up to 10 OZ heavy copper.
• Fine-Pitch BGA Assembly: Achieving ±0.035mm SMT placement accuracy for ultra-dense GPU packages down to a 0.2mm BGA pitch and 0.14mm diameter.
• Premium Laminates: Processing ultra-low-loss materials including MEGTRON 6/7/8, Isola Tachyon, PTFE series, and highly engineered hybrid stack-ups.
• Rapid Turnkey Delivery: Supporting single-piece minimum orders with 24-hour expedited bare-board fabrication.

Send your final stackup and BOM to PCBMay for a comprehensive manufacturability review to secure yield and thermal reliability for your next AI server project.

FAQs

What Types of PCBs Are Used in AI Servers?

AI servers utilize GPU baseboards, server motherboards, switch boards, backplanes, NICs, and power distribution boards. The most complex layer stack-ups and strictest material requirements are on the GPU baseboards and interconnect switch boards.

What Materials Are Used for AI Server PCBs?

High-speed layers rely on low-loss and ultra-low-loss laminates (e.g., Megtron 8, Isola Tachyon). Heavy copper and high-Tg FR-4 are utilized for power and lower-speed control zones.

How Many Layers Do AI Server PCBs Use?

AI server PCBs commonly use high-layer-count constructions. GPU baseboards, switch boards, and backplanes can exceed 20 layers because they need more routing channels, reference planes, and power distribution layers.

Why Do AI Server PCBs Require HDI?

HDI technology uses laser-drilled microvias to route traces out from underneath ultra-fine-pitch BGA packages, saving valuable internal routing space and limiting overall board thickness.

Can AI Server PCBs Use Standard FR-4?

Yes, but only on low-speed control and power layers. Long high-speed data channels (112G/224G) suffer from critical signal degradation on standard FR-4 due to severe signal loss.

Are Hybrid Stack-Ups Suitable for AI Server PCBs?

Yes. Hybrid stack-ups are a highly effective cost-reduction strategy, applying expensive premium laminates only on high-speed layers while using cheaper, high-Tg materials for power layers, provided CTE and press compatibility are verified.

Why Is Back Drilling Used in AI Server PCBs?

Back drilling removes the unused mechanical stub of a via. Without removal, this stub creates an impedance discontinuity that causes signal reflection and degrades insertion loss in data channels like PCIe 5.0/6.0.

What Makes AI Server PCB Manufacturing Difficult?

The simultaneous combination of 30+ layers, dense HDI microvias, tight impedance tolerances, and thick heavy copper makes lamination registration and plating consistency extremely challenging.

How Are AI Server PCBs Inspected and Tested?

Bare boards undergo AOI, electrical isolation testing, TDR for impedance, and destructive microsections. Fully assembled boards require SPI, 3D AOI, and X-ray inspection to verify hidden BGA joints.

Final Thoughts

Building powerful AI servers pushes modern engineering to the absolute limit. Success demands the precise balance of premium laminates, complex HDI routing, and robust power delivery to ensure consistent signal integrity and thermal reliability across complex GPU hardware.