Electronic Assembly Troubleshooting Guide
No, because it cannot be 100% ruled out those errors of any kind can occur during electronics production.
However, assemblies can be delivered to the customer without any errors.
The reasons for this are briefly presented below.
During all steps in the assembly of printed circuit boards, errors of the most varied types can occur with the most varied of probabilities, for example:
- Component electrically defective,
- Component mechanically damaged (pins bent),
- Component not equipped,
- Component assembled twisted,
- A BGA pad not printed with sufficient solder paste,
- Tombstone effect,
- Open solder joint,
- Short circuit in a fine pitch component,
- Etc.
The list of possible defects could go on and on for a very long time.
The causes of the errors can be based on human error, malfunctioning machines, or simply the coincidence of actually, statistically speaking, unlikely events.
It is the task of process control and process optimization to track down the causes of errors and to minimize the likelihood of errors occurring. However, errors cannot be ruled out 100%.
Therefore, after completion of all assembly, soldering, and assembly processes, all assemblies must be carried out using a wide variety of methods (automatic optical inspection, electrical function test, in-circuit test, etc. ) are examined for faultlessness and the causes of faults on the defective assemblies are clearly identified and then safely repaired.
The determined ratio of fault-free assemblies to the total number of assemblies before the faulty assemblies are repaired is called the First Time Yield (FTY).
If the test depth is sufficient through the use of a combination of different test methods and if all defects can be identified and repaired, it is possible to deliver only 100% functioning assemblies to the recipient.
This should justify the assertion made in the first section. If the test depth is sufficient through the use of a combination of different test methods and if all defects can be identified and repaired, it is possible to deliver only 100% functioning assemblies to the recipient.
This should justify the assertion made in the first section. If the test depth is sufficient through the use of a combination of different test methods and if all defects can be identified and repaired, it is possible to deliver only 100% functioning assemblies to the recipient.
This should justify the assertion made in the first section.
If you would like further information, we recommend reading the IPC-7912A, IPC-9261A, and the book “Six Sigma for Electronics Design and Manufacturing” by Sammy G. Shina, published by McGraw-Hill Verlag.
The yield in the assembly process or the error rate of the modules delivered to the customer, therefore, depends on the number of possible errors per module (complexity of the module), the error probabilities that occur in the production process, and the test coverage (test depth).
Let us simply assume that there are only two types of defects in circuit board assembly: the component is defective and the soldering point is not in order and that on average 7 connections (soldering points) can be assigned to each component.
In addition, it was determined in the long term in the assembly process that both types of defects each occur with a DPMO (defects per million opportunities) of 100. The DPMO is defined as the number of defects found per type divided by the total number of defect possibilities per type multiplied by 106.
After completion of the assembly processes, only an automatic optical inspection (AOI) is carried out, whereby the error slip is 10%, ie 10% of all errors are not recognized by the AOI test step or are not subsequently repaired successfully.
The expected yield can be easily calculated from this information and is shown in the following figure depending on the number of components.